PLDA Announces the Successful CXL Interoperability with pre-production Intel Xeon CPU, Code Named Sapphire Rapids

搜索最新SoC解决方案
关于汽车电子...物联网...安全...音频...视频

PLDA XpressLINK™ CXL Controller IP combines the industry’s lowest latency implementation with an easy-to-integrate design, accelerating adoption of CXL in SoC designs.

December 1, 2020 -- PLDA, the industry leader in high-speed interconnect solutions, today announced the successful CXL™ interoperability with pre-production Intel Xeon processors code named Sapphire Rapids. The session was conducted at Intel’s Industry Enabling Labs as part of a long-term collaboration between PLDA and Intel’s industry enabling group. It resulted in demonstrated interoperability between PLDA’s XpressLINK™ CXL IP, running on a PLDA FPGA-based add-in card, and Intel’s development platform equipped with pre-production “Sapphire Rapids” processors.

PLDA XpressLINK controller implements the CXL.io, CXL.cache, and CXL.mem sub-protocols as specified in the recently released CXL 2.0 Specification, and is already being designed-in at leading technology companies.

According to Stephane Hauradou, CTO at PLDA “Today’s demonstration of interoperability between PLDA’s XpressLINK CXL IP, which delivers the lowest latency in the industry, and a cutting edge CPU like pre-production Intel Sapphire Rapids processor, is a critical step in assuring SoC designers of the robustness of our CXL implementation”.

“CXL will be a foundational interconnect technology in the data centers and networks of the future,” said Dr. Debendra Das Sharma, Intel Fellow and Director of I/O Technology and Standards Group, Data Center Group. “The availability of third party silicon IP like the PLDA XpressLINK CXL Controller IP lowers integration risks and helps ensure quicker proliferation of the CXL protocol across the industry ecosystem.”

PLDA XpressLINK and XpressLINK-SOC CXL IP are highly parameterized Compute Express Link (CXL) controller Soft IP designed to the latest CXL Specification and architected for SoC, ASIC, and FPGA implementation. XpressLINK and XpressLINK-SOC are available for licensing immediately and are already designed in at several leading-edge technology companies. Readers interested in learning more about PLDA CXL interconnect solutions can visit PLDA website:

• XpressLINK-SOC CXL Controller with Configurable AMBA AXI Interconnect: https://www.plda.com/products/xpresslink-soc-controller-ip-cxl
• XpressLINK CXL Controller with CPI interconnect: https://www.plda.com/products/xpresslink-controller-ip-cxl

About the Compute Express Link (CXL) protocol

Compute Express Link™ (CXL) is a high-speed CPU interconnect designed to solve the challenge of improving performance and removing bottlenecks between CPUs and other important computing system components like GPUs, memory, and FPGAs. For more information about the CXL technology, visit the CXL Consortium website at https://www.computeexpresslink.org/.

 Back