Chip Makers Must Learn New Ways to Play "D"

By Don Scansen, EETimes (March 19, 2021)

We used to think of planar transistors in the glory days of classical Dennard scaling in two-dimensional terms. Material specifications were simplified into things like sheet resistance in ohms per square. The abstraction of the devices was was all 2-D, and most of the assumptions and the device modeling for understanding MOSFET operation for circuit design were simplified as much as possible to a pair of axes.

We might have thought of planar MOSFETs as 2-D transistors, at least until the assumptions broke down and the complexity of the device physics took off.

Eventually, planar CMOS turned to the third dimension with Intel’s TriGate and other flavors of the finFET. We called these 3-D transistors.

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