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The Synopsys DesignWare® HDMI 2.1 TX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the necessary logic to implement and verify designs for various HDMI-based applications. The IP provides quality digital video and audio transmission with up to 48Gbps aggregate bandwidth for uncompressed 8K resolution at 60Hz refresh rate. It supports key features of HDMI 2.1 including dynamic HDR and enhanced audio return channel (eARC), ensuring higher frameby-frame video quality and most advanced audio formats.

The complete power- and area-optimized HDMI 2.1 TX IP solution encompasses a suite of configurable digital controllers, high-speed, mixed-signal PHY IP, verification IP, High-Bandwidth Digital Camera Protection (HDCP) IP, IP Prototyping Kits, Linux software drivers, and subsystem. Having all necessary design blocks for the HDMI subsystem, the IP solution enables system-on-chip (SoC) designers to lower integration risk and accelerate time-to-market.


  • HDMI 2.1 TX IP solution includes PHYs, controllers, verification IP
  • Compliant with the HDMI 2.1, 2.0, 1.4 and HDCP 2.2, 1.4 specifications
  • Support for key HDMI 2.1 features such as fixed-rate link capable of 48Gbps aggregate bandwidth, enhanced metadata packets including dynamic HDR, eARC, auto low-latency mode and variable refresh rate
  • Optimized for low power and small area
  • Timing hardened blocks simplify placement and design closure
  • Configurable controller architecture optimized for power, performance, and area

Tech Specs

Market SegmentIndustrial and Military Civil Aerospace, Communications, Others, Automotive, Consumer Electronics, Data Processing
Maturity Available on request


  • Fixed rate link with 12Gbps per lane or aggregate bandwidth of 48Gbps to support up to uncompressed 8K resolution at 60 Hz frame rate
  • Hot Plug Detect allows changing of cables and components without switching off the entire system
  • Integrated test features including scope, BIST and loopbacks
  • Optimized pin count, small area to ensure low BOM cost
  • Enhanced audio return channel (eARC)
  • Aggressive ESD protection
  • Fully backward compatible with HDMI 2.0 and 1.4 specifications
  • Integrated test features including scope, BIST and loopbacks
  • Optimized pin count, small area and low power ensure low BOM cost


  • Databook
  • Application notes
  • Assembly guidelines
  • Simulation model
  • Testbench
  • Design files kit: &ndash, Behavioral model &ndash, .LEF file & .LIB file &ndash, GDSII layout database








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