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Embedded FPGA cores for TSMC 40LP/ULP

All Silicon IP

Overview

The EFLX-100 is an embedded FPGA IP core, for implementing reconfigurable logic, containing 120 Look-Up-Tables (LUTs) in Reconfigurable Building Blocks (RBBs), patented interconnect network, multiple clocks & scan: reconfigurable in-field at any time. The EFLX-100 core is available in 5 different configurations and 2 nominal voltages: each optimized for different performance-to-power requirements for different target applications.

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