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DSP Extension Superscalar Processor

All Silicon IP

Overview

D15/D15F are the first dual-issue superscalar AndesCore™ processors. Both processors feature over 130 compiler friendly, general purpose DSP and SIMD instructions that enable easy DSP algorithm programming in C/C++. D15/D15F comes with a variety of configuration options, including MMU, cache and local memory. The 64-bit data buses for caches, local memory and the main bus provide the bandwidth needed for instruction fetch and data access. D15F includes a built-in IEEE-754 compliant floating point unit that enhances the floating point processing capability. D15/D15F is designed for diversified performance-driven applications on the embedded Linux, Real-Time OS or bare metal environment.

  • Dual-issue pipeline
  • > 130 DSP extension instructions
  • Caches for fast code and data accesses
  • Local Memories for deterministic code and data accesses
  • Built-in IEEE754-compliant FPU coprocessor (D15F)
  • Memory Management Unit (MMU) for Linux
  • 64-bit AXI4/AHB/AHBx2 bus interface
  • 业务合作

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