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MIPI CSI-2 Receiver IP

All Silicon IP All Verification IP

Overview

The Arasan MIPI CSI-2 Receiver IP provides a standard, scalable, low-power, and high-speed interface that supports a wide range of high image resolutions. It is compliant with the MIPI CSI-2 v1.3 specification and supports D-PHY v1.2 and MIPI C-PHY v1.1.

Arasan offers C-PHY in a combination configuration that supports both the C-PHY interfaces and the D-PHY interfaces. This IP connects to D-PHY or C-PHY through the PHY-Protocol Interface (PPI) interface that is compliant to the D-PHY and C-PHY specifications. Most of the PPI signals are common for D-PHY and C-PHY except for a few additional signals in each mode. The usage of PHYs is selected by simple programming based on the use case.

Arasan CSI-2 Rx IP, CSI-2 Tx IP, D-PHY IP, and C-PHY IP are silicon-proven and currently used in MIPI Protocol Analyzers and Production Test Applications. Mentor Questa® VIP further enhances Arasan IP compliance to the MIPI Specifications, enabling the IP to meet the stringent requirement of compliance test applications.

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