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All Silicon IP

Overview

The ARIA crypto engine includes a generic implementation of the ARIA algorithm which is the block cipher standard of South Korea.

It is compliant with the RFC 6209 specification and can support several cipher modes including authenticated encryption. It is portable to ASIC and any FPGA's. This algorithm has been adopted in PKCS #11 in 2007 and is used in Secure Real-time Transport

Protocol (SRTP).

Benefits

The BA424 IP core is easily portable to ASIC and FPGA. It supports a wide range of applications on various technologies. The unique architecture enables a high level of flexibility. The IP Core is available in the crypto coprocessor (BA450) and the Root of Trust/HSM (BA470) from Silex Insight.

Applications

  • Wireless communication
  • Payment
  • South Korean market

Features

  • ASIC and FPGA
  • Supports a wide selection of programmable ciphering modes:
    • Non-chaining modes: ECB, CTR
    • Chaining modes: CBC, CFB, OFB
    • Authentication: CMAC
    • Authentication & Confidentiality: GCM, GMAC, CCM, CCM*
  • Supports encryption & decryption
  • Supports 128-bit, 192-bit & 256-bit key sizes
  • Data interface: AMBA (AHB/AXI:AXI-4) with optional DMA
  • Control interface: APB or AXI4-lite

Deliverables

  • Netlist or RTL
  • Scripts for synthesis & STA
  • Self-checking RTL test-bench on referenced vectors
  • Documentation

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