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New Integrity and Data Encryption (IDE) Security IP Module for PCIe 5.0

All Silicon IP All Verification IP

Overview

PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers to their use in consumer electronics. PCI Express links carry high value information between the host and the peripheral and from endpoint to endpoint. The Synopsys DesignWare® Integrity and Data Encryption (IDE) Security IP Module for PCIe 5.0 provides confidentiality, integrity, and replay protection for Transaction Layer Packets (TLP) over PCI Express interfaces as defined in the PCI-SIG IDE specification. The security module integrates seamlessly with the DesignWare PCIe 5.0 controllers to accelerate SoC integration.

DesignWare IDE Security IP Module for PCIe 5.0

The IDE Security Module for PCIe 5.0 (Figure 1) supports maximum throughput in full-duplex for Rx and Tx directions. It provides efficient encryption/decryption and authentication of TLP packets, with optimized high-performance and low-latency AES-GCM cryptographic cores.

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