www.design-reuse-china.com
   Silicon Valley start-up focused on Chiplets for Mass Markets. We are leveraging proven partner IP and our novel die-to-die technology to deliver off-the-shelf, low cost, secure chiplets at scale. We are developing a complete ecosystem of off the shelf Chiplets. www.yorchip.com   
2 SoCs

1
Low Power Dual PHY for UCIe low cost robust Chiplets

YorChip UniPHY™ Dual PHY is a flexible version of YorChip's multi-protocol PHY which supports UCIe and BOW standards. The Dual PHY's unique feature is support for standard 50V CDM chi...


2
5/10/40G Ultra Low Latency MAC PCS with AXI-4 and UCIe support

This IP is optimized for AI/ML workloads and lowest possible latency.

It is not meant to be a generic 1G to 10G MAC – it only supports 5G and 10G operation.


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