The configurable and scalable DesignWare Controller IP for PCI Express (PCIe) supports all required features of the PCI Express 5.0, 4.0, 3.1, 2.1, 1.1 and PHY Interface for PCI Express (PIPE) specifications, and can be configured by the user to support Endpoint (EP), Root Port, Dual Mode (DM), or Switch Port (SW) applications. The high-quality, synthesizable IP portfolio is available in your choice of datapath widths, PIPE interface widths, operating frequencies, and over 1200 configuration parameters, all working together to enable designers to optimize their applications for size, power, latency and throughput. The DesignWare Controller IP portfolio for PCI Express integrates quickly and easily into system-on-chip (SoC) designs with a user-friendly application interface or an industry standard AMBA interface, and conservative timing suitable for a wide range of ASIC and FPGA technologies.

The DesignWare Integrity and Data Encryption (IDE) Security Module for PCIe is pre-verified with the DesignWare Controller IP to help designers protect data transfer in their SoCs against tampering and physical attacks. The standards-compliant IDE Security Modules are designed and validated with Synopsys’ DesignWare Controller IP for PCIe to accelerate SoC integration, offering efficient confidentiality, integrity, and replay protection.

The DesignWare Controller IP for PCI Express has been silicon validated in over 1800 designs with multiple hardware platforms, PHYs and PCIe verification suites, thereby reducing risk and improving time-to-market. As the industry standard for PCI Express, Synopsys offers a comprehensive IP solution that is in volume production and has been successfully implemented in a wide range of applications.