Our Turbo decoding IP core for the 3GPP LTE uplink and downlink uses a novel architecture, which facilitates much higher degrees of parallel processing than competitor solutions, without compromising hardware efficiency or error correction capability. This enables 10x improvements to latency, which satisfies the 7x reduction in processing time that is available in LTE URLLC compared to conventional LTE. Our IP has several parameters, which can be adjusted at synthesis-time to scale the parallelism, latency and throughput.