The DSP-enhanced Synopsys ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Architecture (ISA). The DSP-enhanced ARC processor families support a broad portfolio of certified audio codecs and post-processing software from a range of popular standards including Dolby, DTS, Microsoft and SRS.

With patented configuration technology, the cores can be easily customized to meet any application requirement from ultra-small task-specific controllers robust application processors. Additionally, the extendible instruction set makes it possible for customers to add instructions and operations to provide additional acceleration and more efficient operation, resulting in highly differentiated designs that cannot be built with standard, off-the-shelf DSPs or CPUs.

These processors are also designed to be tolerant to high memory latencies. Compared to other solutions in the market, the impact of latency on the processor load is negligible, making the ARC processors the best solution for systems like video and graphics IP, where DDR memory is shared with other resources.

See Synopsys portfolio of ARC codecs that are optimized for ARC processors with DSP capabilities.