Arteris tackles tyranny of wires

Wires are the problem. The smaller they get the more resistance they have and the closer together they are the more they interfere with eachothers' signals and the more transistors on the chip the more wires there have to be.

By David Manners - Electronics Weekly, Oct. 22, 2015 – 

But the whole direction of scaling is to create more wires, thinner wires and wires which are closer together.

The answer according to Arteris is topology. Arteris' Kurt Shuler says: "The founders are networking guys and they thought it would be useful to apply networking concepts to chip design."

By visualising a bird's-eye view of the topology the Arteris IP automatically generates a structure which optimises timing and routing.

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