Synopsys Touts 'Visually Assisted Automation' For FinFET Design

by Dylan McGrath - EETimes

SAN FRANCISCO, Mar. 30, 2016 – 

EDA and IP vendor Synopsys Inc. Wednesday (March 30) introduced a new custom design tool that aims to help offset design challenges posed by the era of FinFETs with an intuitive concept dubbed visually assisted automation.

The incorporation of FinFETs - 3D transistors - create significant challenges for designers, including increased design rule complexity, additional layers of interconnect and the need for the use of double-pattern lithography to produce them. Synopsys estimates that it takes about three times more effort to do a custom designed circuit with FinFETs than it would take to do an equivalent planar circuit, according to Dave Reed, director of marketing for Synopsys' analog/mixed-signal design tool group.

"FinFET brings a significant challenge to custom design," Reed said in an interview with EE Times.

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