Moortec to exhibit at next week's TSMC China Technology Symposium

May. 17, 2016, May. 13, 2016 – 

As a member of the TSMC IP Alliance, Moortec Semiconductor will be attending the TSMC 2016 China Technology Symposium which is taking place next Tuesday in Shenzhen.

Why not come and meet us at booth 29 and discuss in person how your advanced node System on Chip (SoC) programme can benefit from Moortec's high performance analog IP?

Specialising in embedded Process, Voltage and Temperature (PVT) sensors, Energy Optimisation Sub-systems (EOS) and Global Device Monitoring (GDM) for advanced nodes, Moortec's IP enables SoC designs to be performance optimised and monitored on a per die basis.

Moortec specialises in the following IP solutions:

• PVT Monitoring IP - 'Lift the lid' on conditions on-chip for performance optimisation and reliability. High accuracy on-chip thermal sensing, supply monitoring and process type discovery at 28nm and FinFET. For Dynamic Frequency and Voltage Scaling (DVFS), device life-time reliability, device characterisation and thermal profiling.
• Energy Optimisation IP - Optimise device power consumption or optimise data throughput with Moortec's EOS sub-system. Achieve by monitors sensing the device's embedded conditions. Available for advanced nodes with AMBA APB, iJTAG, I2C and SPI interfacing.
• Global Device Monitoring - Provision for deeper in-field monitoring.

To arrange a meeting with Moortec Semiconductor at this event to discuss your analogue IP requirements please contact: ramsay.allen@moortec.com

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