New Semiconductor Processes Offer Power Efficiency Opportunities for Apple Watch

by Chris Jenkins, Aug. 09, 2016 – 

One of the key challenges for Apple in developing the Apple Watch was figuring out how to maintain acceptable battery life for the device in the face of power-hungry components such as the main processor and display.

With watchOS 3 introduced at WWDC in June, Apple showed off the ability to allow multiple Apple Watch apps to remain active and refresh in the background, acknowledging that its initial approach to managing power and other system resources was conservative but that real-world experience had shown the device could handle more demanding tasks.

In addition to software improvements, future generations of the Apple Watch will need to become more efficient on the hardware level, with new versions of the S1 chip that serves as the brains of the device being a primary target for improvement. With that in mind, we've taken a technical look at what the future could hold for semiconductor technology as it relates to battery-limited devices like the Apple Watch.

As transistors begin to reach their physical size limits in modern semiconductor processes, it becomes more difficult, and thus more expensive, to make them smaller. In addition to the cost per transistor no longer shrinking, it also becomes more difficult to control waste power, or leakage. New transistor geometries such as non-planar "3D" FinFETs are becoming popular to address device leakage, but as wearables such as the Apple Watch have begun generating consumer interest, the gains seen in these semiconductor processes are simply still not enough.

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