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Synopsys' Complete CCIX IP Solution Enables Cache Coherency for High-Performance Cloud Computing SoCs

New DesignWare CCIX Controller, PHY and Verification IP Supports Speeds Up to 25Gbps and Enables Faster Data Access

MOUNTAIN VIEW, Calif., Jun. 06, 2017 – Synopsys, Inc. (Nasdaq: SNPS) today announced immediate availability of its complete DesignWare® CCIX IP solution, consisting of controller, PHY and verification IP delivering data transfer speeds up to 25Gbps and supporting cache-coherency for high-performance cloud computing applications. The Cache Coherent Interconnect for Accelerators (CCIX) standard allows accelerators and processors to access shared memory in a heterogeneous multi-processor system for significantly lower latency. In addition, CCIX leverages the PCI Express 4.0 line rates with extended speed modes to accelerate throughput up to 25Gbps for applications such as machine learning, network processing and storage off-load. The new DesignWare CCIX IP solution is built on Synopsys' silicon-proven PCI Express 4.0 architecture, which has been validated in over 1500 designs and shipped in billions of units, enabling designers to lower integration risk, while accelerating adoption of the new standard.

"CCIX leverages the PCI Express protocol to support several line rates with additional high-speed 25Gbps option to address the need for higher bandwidth, lower latency and ease of programming in data center applications," said Gaurav Singh, chairman of the CCIX Consortium. "As a contributing member of the CCIX Consortium and with the availability of the DesignWare CCIX IP solution, Synopsys helps accelerate adoption of the standard and allows designers to deliver emerging data-intensive computing SoCs with a new class of interconnects."

Synopsys' interoperable CCIX controller, PHY and verification IP solution enables faster system integration. The RAS features in the DesignWare CCIX controller offer data protection and integrity in the datapath and read-access memory (RAM). In addition, debug capabilities, error injection and statistics monitoring give visibility into components such as link training and status state machine (LTSSM) and PHY equalization process for a more comprehensive system testing. The CCIX PHY IP uses power management features such as I/O supply underdrive, V-Boost OFF and decision feedback equalization (DFE) bypass to significantly reduce power consumption. The PHY optimizes performance across voltage and temperature variations and includes adaptive continuous time linear equalizer (CTLE), DFE and feed forward equalization (FFE) for superior signal integrity and jitter performance. Synopsys' Verification IP for CCIX includes configurable environments, complete port-level checks and system-wide coherency checks for rapid coherency verification.

"As the industry's most trusted IP provider for nearly two decades, Synopsys has consistently provided our customers with a broad portfolio of high-quality IP for emerging standards such as CCIX," said John Koeter, vice president of marketing for IP at Synopsys. "By providing a complete CCIX IP solution based on our silicon-proven PCI Express architecture that has been used by more than 250 companies, Synopsys enables designers to achieve the multi-gigabit performance and cache coherency requirements of their cloud computing designs with less risk."

Availability & Additional Resources

The DesignWare CCIX Controller, PHY and Verification IP for CCIX are available now.

For more information, visit DesignWare CCIX IP Solutions website.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit www.synopsys.com/designware.

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