www.design-reuse-china.com
搜索,选择,比较,与提供商进行安全高效的联系
Design & Reuse We Chat
D&R中国官方微信公众号,
关注获取最新IP SOC业界资讯

Distributed In-Chip Thermal Sensors Improve Multicore CPU Monitoring

By Nitin Dahad, EETimes (June 15, 2020)

With silicon geometries scaling to 5nm, thermal activity escalates and monitoring becomes critical to maintaining accuracy and reliability. To address this, Moortec, a provider of in-chip monitoring, telemetry and analytics technology, has introduced a distributed thermal sensor (DTS) on TSMC’s N5 process, which it claims is significantly smaller and more accurate compared to current in-chip thermal sensor solutions.

In order to meet performance requirements in systems-on-chips (SoCs) employing FinFET technology with higher gate densities (and hence power densities), designers are facing challenges in providing reliable, power efficient and speed optimized chip designs. Thermal activity can be unpredictable and if not monitored carefully can cause over-heating and excessive power consumption which in turn impacts device longevity. The ability to make precise thermal measurements beside or within CPU cores, high speed interfaces or highly active circuitry has become a mandatory requirement for devices used within a range of application areas.



Moortec IP Cores

The new DTS sensing fabric enables distributed, real-time thermal analysis, enabling up to 16 remote probe points in a silicon area that Moortec said is seven times smaller than some standard in-chip thermal sensors. At a recent press briefing, Stephen Crosher, CEO of Moortec, said, “The DTS is smaller in size and integrates within the chip. It can run off the core supply to do the sensing so can sense deeper within the chip — this is important for larger die sizes.”

Click here to read more ...

 Back

业务合作

添加产品

供应商免费录入产品信息

点击此处了解更多关于D&R的隐私政策

© 2026 Design And Reuse

版权所有

本网站的任何部分未经Design&Reuse许可,
不得复制,重发, 转载或以其他方式使用。