芯来科技携手西门子EDA，推进RISC-V CPU Trace完整解决方案

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近日，西门子EDA与芯来科技宣布达成战略合作：西门子EDA的Tessent™ Enhanced Trace Encoder增强型追踪编码器解决方案已全面支持芯来RISC-V处理器内核，该解决方案将为选择芯来科技RISC-V CPU IP的客户提供一种实时监控CPU程序执行的机制。它将在SoC层面对程序执行（指令跟踪）以及可选的加载和存储指令中的数据（数据跟踪）进行编码，以高度压缩的格式输出跟踪，使用户在复杂的异构设计中显著提高生产效率。

www.nucleisys.com, Mar. 01, 2024 – 

Nuclei System Technology today announces a strategic collaboration with Siemens Digital Industries Software. The companies are working on full Tessent™ Enhanced Trace Encoder solution support for Nuclei's RISC-V processor cores. The collaboration provides real-time monitoring of CPU program execution for customers choosing Nuclei System Technology's RISC-V CPU IPs. It encodes program execution(instruction tracing) and optional loading and storing of data in highly compressed formats at the SoC level, significantly enhancing production efficiency for users in complex heterogeneous designs.

Tessent Enhanced Trace Encoder增强型追踪编码器解决方案是西门子EDA的Tessent Embedded Analytics嵌入式分析产品线成员产品。通过这一联合解决方案，开发人员可以有效地追踪和调试芯片和软件之间的问题，并能准确了解基于芯来RISC-V CPU IP的实时运行状态。Tessent Enhanced Trace Encoder增强型追踪编码器完全满足RISC-V基金会调试和追踪工作组（Debug and Trace Working Group）制定的标准规范，同时还支持自定义指令的调试跟踪，为用户提供了一个更为高效的调试工具环境，在复杂系统的开发中能够显著提升的研发效率。

Siemens' Tessent Enhanced Trace Encoder solution is part of Siemens' Tessent Embedded Analytics product line. Through this combined solution, developers can effectively trace and debug issues between chips and software, gaining accurate insights into real-time operational states based on Nuclei's RISC-V CPU IPs. The Tessent Enhanced Trace Encoder solution fully complies with the Efficient Trace(E-Trace) standard specifications set by the RISC-V Foundation Debug and Trace Working Group. It also supports debugging traces for custom instructions, providing users with a more efficient debugging tool environment that significantly enhances research and development efficiency in complex system development.

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