台积电在熊本建3奈米厂 日本批准补助资格

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https://www.ntdtv.com/gb/2026/10/17/a104142661.html – Oct. 16, 2026 –

The Japanese Ministry of Economy, Trade and Industry (Ministry of Economy, Industry) of the Japanese Government announced on Friday (October 16) that it has approved TSMC's plan to produce advanced semiconductors for a 3-nanometer process in the second factory in Kumamoto Prefecture. This will be the first time that a manufacturer has manufactured 3nm process chips in Japan.

TSMC previously planned to manufacture semiconductors such as 6nm and 12nm in the second factory, but it was announced in February this year that the second wafer factory in Kumamoto would adopt 3-nanometer process technology for production.

Asahi News reported that TSMC's Kumamoto No. 2 Factory is still under construction, which is adjacent to TSMC's Kumamoto No. 1 Factory, which has been put into production.

TSMC's Kumamoto No. 2 Factory originally planned to manufacture semiconductors with a monthly production capacity of 48,000 pieces, and planned to produce semiconductors for a 40-nanometer process. According to the new production plan, the monthly production capacity of the 3-nanometer process is 6,000 chips.

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