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Automotive Qualified MTP in 0.18um Process

All Silicon IP

Overview

This IP is available in a 180-nanometer (nm) mixed signal 1.8V/5V CMOS and a 180nm BCD process. The NSCore NVM IP does not require any additional masks or process steps. Using this IP will reduce the overall cost to manufacture chips by up to 30%. Adopting the NSCore NVM IP can also increase the actual chip output of the foundry. This approach will enable a 30% reduction in the photo lithography steps required to build each chip using the NSCore IP, compared to embedded Flash memory solutions. By deploying the NSCore NVM IP, a foundry has the potential of increasing the total number of wafers fabricated each day by up to 30%. This will enable to the foundry to significantly increase its production to address the needs of the semiconductor market.

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