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32-bit High Performance Single/Multicore RISC System-on-Chip
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Overview The CC100-S is a synthesisable Verilog model of a high performance 32-bit RISC processor based System-on-Chip. The model is highly configurable and embeds a wide range of peripherals. The SoC can be efficiently implemented on FPGA and ASIC technologies and uses standard synchronous memory cells for caches and register file.
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