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143 "RISC-V" SoCs

1
ARC-V Processor IP

High-performance, Mid-range, and Ultra-low Power RISC-V Processor IP

Synopsys ARC-V Processor IP™ builds on the existing ARC processor offerings, while giving customers access to the ex...


2
ARC-V RHX-105 dual-issue, 32-bit multi-core RISC-V processor for real-time applications
The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-time performance is required. The cores offer outstanding perform...

3
ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
The Synopsys ARC-V™ RMX-500 series processors are optimized for use in embedded applications where power and performance efficiency are key concerns. The DSP enhanced implementation (RMX-500D) adds DS...

4
Security Enclave IP based on RISC-V
The eSecure IP is a single subsystem for RISC-V based SoC to address key security challenges, playing the role of root-of-trust. The module is highly flexible and fits all applications of the heteroge...

5
RISC-V SOC Platform
A SOC development platform for RISC-V based designs

6
Tessent RISC-V trace and debug
The Tessent Enhanced Trace Encoder is the market-leading trace solution for RISC-V. It is a fully-featured solution that provides a mechanism to monitor the program execution of a CPU in real time. It...

7
32 bit - Compact RISC-V Processor Core
The L11 is a small, efficient 32-bit embedded RISC-V processor aimed at embedded systems with more modest processing requirements. The core has a 3-stage pipeline and with 16 general purpose registers...

8
32 Bit - Embedded RISC-V Processor Core
The L31(F) is a small, efficient 32-bit embedded RISC-V processor aimed at embedded systems with more modest processing requirements. The core has a 3-stage pipeline and has 32 general-purpose registe...

9
32-bit Embedded RISC-V Functional Safety Processor
The EMSA5-FS is a processor core designed for functional safety. The fault-tolerant processor uses dual or triple instances of the EMSA5, an efficient 32-bit embedded processor IP core implementing th...

10
64-bit RISC-V application processor core with 7-stage pipeline

The A70X is a powerful 64-bit RISC-V application processor aimed at systems running Linux. The core has an in-order 7-stage pipeline enabling greater than 1 GHz frequencies in 22nm HPC.

The...


11
64-bit RISC-V application processor core with L2 cache coherence
The A70X is a powerful 64-bit RISC-V application processor aimed at systems running Linux. The core has an in-order 7-stage pipeline enabling greater than 1 GHz frequencies in 22nm HPC. The core incl...

12
Codasip L110 32-bit RISC-V embedded processor

Codasip® L110 is a 32-bit RISC-V embedded processor, focused on small-area and low-power applications.

The core is highly configurable, allowing different area and performance levels, wit...


13
Compact efficient 64-bit embedded RISC-V processor
The Bk5 is an entry level, compact, efficient 64-bit embedded RISC-V processor aimed at embedded systems requiring a large address space.

14
Compact RISC-V Processor - 32 bit, 3-stage pipeline, 16 registers

The L10 is a small, efficient 32-bit embedded RISC-V processor aimed at embedded systems with more modest processing requirements. The core has a 3-stage pipeline and with 16 general purpose regist...


15
Compact RISC-V Processor - 32 bit, 3-stage pipeline, 32 registers

The L30(F) is a small, efficient 32-bit embedded RISC-V processor aimed at embedded systems with more modest processing requirements. The core has a 3-stage pipeline and has 32 general-purpose regi...


16
Compact, efficient 64-bit RISC-V processor with 5-stage pipeline
The H50X is an entry level, compact, efficient 64-bit embedded RISC-V processor aimed at embedded systems requiring a large address space. The core has a 5-stage pipeline and is offered in two version...

17
Dual-issue Linux-capable RISC-V core
The A730 is a dual-issue, in-order, 64-bit application processor capable of running Linux. The core is compatible with the RISC-V RVA22 profile. The core includes a hardware floating point unit, L1 da...

18
Low-Power Deeply Embedded RISC-V Processor
The BA53 is a configurable, low-power, deeply-embedded RISC-V processor IP core.

19
NOEL-V Processor

The NOEL-V is a synthesizable VHDL model of a processor that implements the RISC-V architecture. The NOEL-V is designed for space applications: with its high-performance and fault-tolerant design, ...


20
Powerful 64-bit embedded RISC-V processor
The Bk7 is a powerful 64-bit embedded RISC-V processor aimed at systems running Linux.

21
Single issue, embedded RISC-V core with 4-stage pipeline
The Western Digital SweRV Core™ EL2 is a single issue, RV32IMC, single-issue core with a 4-stage in-order pipeline. Like the EH1 and EH2, it supports optional instruction and data closely coupled memo...

22
SweRV EH1 Support Package
The SweRV EH1 Support package (SSP) contains everything needed to deploy a Western Digital SweRV EH1 core in an integrated circuit

23
32-bit 8-stage superscalar processor that supports RISC-V specification, including GCN
The 32-bit N45 is an 8-stage superscalar processor that supports RISC-V specification, including (IMAFD) standard instructions, 16-bit compression instructions, and for user-level interrupts. It iss...

24
32-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP (DSP)
The 32-bit D45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit compression instructions, “P” Packed-SIMD/DSP instructi...

25
32-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP and Linux
The 32-bit A45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit compression instructions, “P” Packed-SIMD/DSP instructi...

26
64-Bit 8-stage superscalar processor that supports RISC-V specification, including GCN
The 64-bit NX45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit compression instructions, and “N” for user-level inter...

27
64-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP and Linux
The 64-bit AX45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit compression instructions, “P” Packed-SIMD/DSP instruct...

28
64-bit CPU with Modern RISC Architecture, MemBoost and PMA
The 64-bit AX27 is a 5-stage processor that supports the latest RISC-V specification, including G (IMAFD) standard instructions, C 16-bit compression instructions, P Packed-SIMD/DSP instructions, N fo...

29
64-bit CPU with RISC-V Vector Extension
The 64-bit NX27V is a vector processor with 5-stage scalar pipeline that supports the latest RISC-V specification, including the IMAFD standard instructions, "C" 16-bit compression instructi...

30
64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
AndesCore™ AX45MPV 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeStar™ V5 architecture. It supports RISC-V standard “G (IMA-FD)”, “C” 16-bi...

31
AHB-Lite PLIC - RISC-V Compliant Platform Level Interrupt Controller
Fully Parameterized & Programmable Platform Level Interrupt Controller (PLIC) for RISC-V based Processor Systems supporting a user-defined number of interrupt sources and targets, and featuring a single AHB-Lite Slave interface

32
AndesCore N25F-SE 32-bit CPU IP

AndesCore™ N25F-SE is a 32-bit CPU IP core that supports ISO 26262 ASIL B level functional safety for automotive applications. Approved based on the functional safety assignments of a Safety ...


33
AndeSight IDE
AndeSight™ has Standard, MCU, RDS and Lite versions and is an Eclipse-based integrated development environment that provides an efficient way to develop embedded applications of the target systems on AndesCore™ based SoC platforms.

34
Compact and Performance Efficiency 32-bit RISC-V Core
The AndesCore™ N225 is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications with small gate count, and some dual-issue ability. In addition to commonly us...

35
Compact High-Speed 32-bit CPU Core
AndesCore™ N25 is a 32-bit CPU IP core based on AndeStar™ V5m Instruction Set Architecture, which support RISC-V RV32IMAC extensions from the latest developments in computer architecture a...

36
Compact High-Speed 32-bit CPU Core with DSP
Compact High-Speed 32-bit CPU Core with DSP

37
Compact High-Speed 32-bit CPU Core with DSP
AndesCore™ D25F is a 32-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is capable of delivering high per-MHz performance and operating at high frequencies,...

38
Compact High-Speed 64-bit CPU Core
NX25 is a 64-bit CPU IP core for applications with memory usage greater than 4G bytes, which is the bound of 32-bit processors. NX25 let high performance computing with very little silicon footprint achievable by its AndeStar® V5m Instruction Set Architecture.

39
Compact High-Speed 64-bit CPU for Real-time and Linux Applications
AndesCore™ AX25 is a compact 64-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is tailored for high-performance embedded applications that needs to access address space over 4GB.

40
Compact, Secure and Performance Efficiency 32-bit RISC-V Core
AndesCore™ D23 is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5/V5e architecture for embedded applications with small gate count, and some dual-issue ability. In addition to commonly use...

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