Through the VIRTUALYZR tool we present an innovative way to verify the security of the design at the pre-Silicon level. Such an early stage verification of the security can be seen as new Electronic Design Automation (EDA) tool that allows to add a new layer of verification to the lifecycle of an embedded implementation before being packaged into a chip.
The VIRTUALYZR is a software tool that aims at assessing the hardware security layer of an embedded system at the pre-silicon stage.
The VIRTUALYZR is used at the digital design level and provides an end-to-end workflow that starts by a design input and ends by a report generation. This tool allows detecting potential vulnerabilities that might exist in the design.
The VIRTUALYZR exploits simulation activity results in order to build an equivalent of power consumption traces and then perform physical analysis. It allows the detection and localization of leakage nodes in the design. The leakage detected can be due to many errors in the design like a miss-integration or a weak countermeasure. It can be also behind a bad synthesis of the design.
The VIRTUALYZR is mapped with the HDL simulator to run simulation of the design.