www.design-reuse-china.com
搜索,选择,比较,与提供商进行安全高效的联系
You are here : design-reuse-china.com  > Design Platform  > SoC Design Systems

ORC5000 ASIC Platform for Low-Power

All Silicon IP

Overview

The ORC5000 ASIC's highly integrated design achieves significant improvements in power consumption for a wide range of applications. The ASIC platform is designed for highly complex, multi-channel modem and signal processor integration. It supports an internal PHY for access to large external LPDDR4x memory for samples or other large data set storage tasks. The LPDDR4x PHY with low-voltage operation enables low power consumption, which is critical for power-sensitive designs.

The ASIC platform's flexible serial peripheral interface (SPI) enables gigabit data throughput with an external microcontroller or external flash memory. The platform also supports mixed-signal integration including an analog PLL for generating high-speed clocks for the DDR PHY, high-speed digital circuits and other peripherals. Depending on the custom design requirements, power management circuits (e.g. DC-DC convertors and LDOs), memories (e.g. NVM and SRAM) and peripheral interfaces such as UART and USB can be integrated into the ORC5000 ASIC platform.

The low-power ORC5000 ASIC platform supports an ambient industrial temperature range of -40 °C to +85 °C and enables exceptional system cost savings, efficient power system design, and reduced peripherical component count and PCB area.

The ORC5000 ASIC platform based on the GF 22FDX® platform has significant advantages for use in LEO satellite payloads due to its low power consumption and low susceptibility to latch-up and single event effects (SEE). The new platform also uses GF's eMRAM technology in the application CPU subsystem, which enables low power and reduced soft-error rate and improves reliability for satellite communications.

业务合作

广告发布

访问我们的广告选项

添加产品

供应商免费录入产品信息

点击此处了解更多关于D&R的隐私政策

© 2023 Design And Reuse

版权所有

本网站的任何部分未经Design&Reuse许可,
不得复制,重发, 转载或以其他方式使用。