ACE works in conjunction with industry-standard synthesis tools, allowing FPGA designers to easily map their designs into Achronix Speedster®22i FPGAs.

High Performance Tools for Developing Arm Based HPC Solutions

The Arm SDK-700 System Design Kit offers a solution to help build secure SoCs for rich IoT nodes, gateways, and embedded applications.

Built for Hybrid Environments

The majority of companies developing ICs have significant investments in computing capacity in the form of on-premises datacenters. For efficiency reasons, c...

The Arm Cortex-A5 processor is ideal for building high-performance and feature-rich SoCs for embedded and IoT applications. The Cortex-A5 processor is the smallest application processor in the Cortex-...

Coverity is an accurate and comprehensive static analysis and Static Application Security Testing (SAST) platform that finds critical defects and security weaknesses in code as it s written before they become vulnerabilities, crashes, or maintenance headaches.

This silicon proven, customizable integrated power management subsystem provides a cost-effective single-chip solution for power management. Typical target applications include portable low-power consumer products or any application, with a need to control diverse power domains.

The DesignWare® ARC® HS Development Kit is a ready-to-use platform for rapid software development on the ARC HS3x family of processors.

The DesignWare® HPC Design Kit, part of Synopsys' Foundation IP portfolio, is a suite of high-speed and high-density memories and logic libraries that allow SoC designers to optimize their processor cores for maximum speed, smallest area, lowest power, or an optimum balance of the three for their specific application.

The DesignWare Self-Test and Repair (STAR) Memory System is a comprehensive, integrated test, repair and diagnostics solution that supports repairable or non-repairable embedded memories across any fo...

The ESW-01 DTCP-IP Software Development Kit (SDK) is part of the Ellipsys Security Architecture (ESA) which offers a comprehensive set of security software for embedded applications. Digital media is...

The Secure Real-time Transport Protocol (SRTP) defines a framework which provides confidentiality, message authentication, and replay protection for both unicast and multicast RTP (Real-time Transport...

Delivering the best possible productivity during RTL design and the highest quality of results (QoR) in final implementation

The HDCP 2.0 Software Development Kit (SDK) is a proven, robust and cost effective HDCP 2.0-based copy protection solution for digital entertainment content in the wireless and wireline home network e...

The I3C Total IP in a box HDK gives I3C SoC developers all the resources they need to implement MIPI I3C specifications right out of the box.

The Cadence® Innovus™ Implementation System is optimized for industry-leading embedded processors, as well as for 16nm, 14nm, 10nm, and 7nm processes, helping you get an earlier design start with a faster ramp-up.

Built on a multi-threaded frame-based architecture, the Joules RTL Power Solution delivers 20X faster time-based RTL power analysis as compared to other methods.

The Cadence® Protium™ X1 Enterprise Prototyping Platform is a first-of-its-kind enterprise prototyping platform. Architected from the ground up to provide extreme scalability and flexibility in a data center-optimized form factor, it is addressing your requirements of today, and growing with you, as your designs and demands are growing tomorrow.

Virtualizer Development Kits (VDKs) are software development kits containing design-specific virtual prototypes as well as debug and analysis tools and sample software.

The Virtuoso® System Design Platform links two world-class Cadence technologies–custom IC design and package/PCB design/analysis–creating a holistic methodology that automates and streamlines the design and verification flow for multi-die heterogeneous systems.

The ZView Integrated Development Environment (IDE) features a debugger as part of the Eclipse software development environment. Eclipse is an open, industry supported, extensible, software development...

It is a complete reference design for a CAN node subsystem based on the CAN-CTRL CAN 2.0 & CAN FD Bus Controller IP Core. It can be used for evaluating the CAN-CTRL core, and it enables the rapid development of CAN FD applications or device prototypes.

It combines MIPS processor, Ensigma connectivity and FlowCloud platform to deliver a new class of embedded Connected Processor solutions that will power the Iernet Everywhere generation of consumer electronics.

GUC HBM2 IP is a complete solution for SoC design targeting high bandwidth applications such as AI, HPC, data centers and networking.

The industry leading N5 ASIC platform aiming for High Performance Computing, AI/ML, and Networking applications, providing comprehensive N5 IP ecosystem along with advanced 2.5D package (CoWoS,InFO_oS) solution.

The Navigator Console is the command line interface software included with the Navigator EJTAG probes for debugging Imagination Technologies MIPS-based cores. Navigator Console software is based on t...

MIPS Navigator probes support the latest cores and licensee processors in the MIPS32 family including microAptiv, interAptiv, and proAptiv cores. It also supports the classic MIPS32 cores from the 4K ...

EJTAG probe featuring iFlowtrace trace system for MIPS32, M14K, M14Kc, and M4K cores and microcontrollers. The Navigator iFlowtrace probe consists of the Navigator EJTAG probe with instruction trace ...

MIPS Navigator Pro probes support all MIPS 32 cores with PDtrace if the core is designed to stream processor trace data off-chip. Navigator Pro probes support both on-chip and off-chip trace feature...

The System Navigator probe is designed to support the special features and integrated peripherals of 8051 cores from several IP vendors. The System Navigator probes are available for the following cor...

New Key features of Codasip Studio 8.1 : Added support for SW breakpoints, Added support for Synopsys VCS.

New Architectures Support High Bandwidth, High Density, Lower Power

eSilicon offers a set of high-performance and high-bandwidth IP and 2.5D solutions on 7nm technology that target...

FPGA-to-ASIC conversion service is introduced to meet the requirements of lower BOM cost, lower power consumption, higher integration for miniaturization, and long-term supply commitments, as well as a strategic response to FPGA End-of-Life (EOL) events.

New Architectures Deliver Unprecedented Performance, Density and Configurability

eSilicon offers a set of high-performance and high-bandwidth IP and 2.5D solutions on 7nm technol...

The SOCC-1110 is an 8051 based configurable SoC platform. The platform contains an 8051 CPU core, and all the peripheral functions required for a basic SoC. The SOCC-1110 contains a single cycle 8051...

The SOCC-2110 is an 80251 based configurable SoC platform. The platform contains an 80251 CPU core, and all the peripheral functions required for a basic SoC. The SOCC-2110 contains a single cycle 80...

To help customers shorten time-to-market, provides a virtual platform with IP models right after the system specification confirmed. It makes concurrent hardware and software development possible to reduce time to market effectively.

ADP-XC7KFF676 is a multi-purpose development and prototyping board that provides rich capacity for evaluation of variety of AndesCore™ processors and AndeShape™ SoC platform IPs. It works ...

AE210P is a generic SoC platform IP which provides users with high flexibility, low cost and fast time to market for micro-controller applications such as Internet of Things (IoT) and Wearable Computing.

The Cortus Development Platform is an ideal tool for evaluating and prototyping the full range of Cortus APS 32 bit processor cores. It is also a vehicle for developing hardware and software for Cortus-based systems including multi-core ones.