Alphawave Semi

The Deterministic Random Bit Generator is an essential silicon-proven digital IP core for all FPGA, ASIC and SoC designs that targets cryptographically secured applications. It is a deterministic algo...

The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require a source of random numbers, such as the creation o...

The PRNG IP core establishes a benchmark for hardware-based security in cryptographic systems by generating high-quality pseudorandom numbers. It delivers accelerated output rates essential for secure...

The PRNG IP core establishes a benchmark for hardware-based security in cryptographic systems by generating high-quality pseudorandom numbers. It delivers accelerated output rates essential for secure...

NCR (Network Clock Reference) is a procedure to provide the master clock (i.e. time information) of the satellite to all its user terminals. Typically, NCR packets are provided periodically over a con...

ESD solutions and Analog Pads * All voltage domains (0.85V to 5.0V)

​The True Random Number Generator (TRNG) Digital Noise Source is a standard-cell based entropy generator compliant with the statistical test of the FIPS SP 800-90 and AIS31 standards.

The True Random Number Generator (TRNG) Digital Post-Processing is a digital IP compliant with the AIS 31 and NIST SP 800-90B standards.

TRNG Core meets NIST SP 800-90A/B standard It is the basis of the ICTK Root of Trust System, mainly it comes with other Security Element blocks.

The eSi-TRNG is a high quality implementation of a True Random Number Generator fully compliant with latest NIST 800-22. The block uses a standard AMBA APB Bus interface.

The TESIC-310 IP is a turnkey solution to provide a secure boot facility to an SoC. It implements the Post Quantum secure Leighton-Micali Signature (LMS) as specified in NIST SP800-208. The TESIC-310 ...