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PCI Express Gen5 PHY & Controller IP Cores available in major Fabs & Foundries for Graphics, Memory and Storage Applications

April 23, 2021. – T2M-IP, The global independent semiconductor IP Cores & Technology experts, is pleased to announce the immediate availability of its’ partners advanced PCIe Gen5 – PCIe Gen1 PHY and Controller IP Cores for Graphics, Memory and Storage Applications. All Phys and Controllers are backward compatible with previous generations: PCIe 5.0 32GT/s (Gen5), PCIe 4.0 16GT/s (Gen4), PCIe 3.0 8GT/s (Gen3), PCIe 2.0 5GT/s (Gen2), PCIe 1.0 2.5 GT/s (Gen1) which are compliant with the latest PIPE specifications. The PCIe Phy and Controllers are Silicon Proven in advanced process nodes from major foundries.

The PCIe PHY IP consists of both the Physical Media Attachment (PMA) layer and the Physical Coding Sublayer (PCS) and connects easily to the PCIe MAC layer using the standard PIPE- interface. The PCIe Gen5 to Gen1 PHY IP’s are optimized for low power consumption and minimal die area without sacrificing performance and high-data throughput. Each PCIe PHY IP comprises of a complete on-chip physical transceiver solution with Electrostatic Discharge (ESD) protection, built-in self-test module with embedded jitter injection, and a dynamic equalization circuit that ensures full support for high-performance designs too. The low power mode settings are fully configurable enabling the performance of the IP to be tuned across various application scenarios to achieve application specific power consumption considerations.

High-performance PCIe Gen5 – 1 Digital Controller IP Cores are full-featured, easy-to use, synthesizable design that are easily integrated into any SoC or FPGA developments. The PCIe controller IP Cores support a variety of host bus interfaces for easy adoption into any design architecture which are compliant and supports both PIPE SerDes and non- SerDes architecture. The PCIe Controller IP Cores are validated using FPGA. The delivery includes RTL code, test scripts and a test environment for complete simulation.

The PHY’s and Controllers are available independently or pre-integrated as a fully validated and integrated solution The PCIe PHY’s and Controllers can also be licensed separately and integrated with third-party PHY / Controller solutions. The entire solution is Silicon and Production Proven in various end application SoCs.

PCI Express Gen5 IP Cores

In addition to PCIe, T2MIP’s broad silicon Interface IP Core portfolio also includes USB, MIPI, Display Port (DP, eDP), DDR, HDMI,10/100/1000 Ethernet, V-by-One, Serial ATA, and programmable SerDes, etc... in major Fabs, in process geometries down to 12nm.

Availability: These Semiconductor Interface IP Cores are available for immediate licensing stand alone or pre-integrated with the matching Controllers. For more information on licensing options and pricing please drop a request / MailTo

About T2M: T2MIP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit: www.t-2-m.com







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