Ultra-low power RISC-V microcontroller CPU

All Silicon IP

Overview

High efficient instruction execution pipeline
- Short pipeline design for low-power applications; class leading performance.
Ultra-low power, high energy efficiency
- Extensive clock gating and low-power microarchitecture designs, multiple sleep modes, and data gating.
Deep customized solutions
Customized instruction set and microarchitecture
- With domain specific architecture, we optimize customer silicon PPA with agile development of RISC-V custom instruction set.

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