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67 "Cryptography" Solutions

1
ARIA Crypto Engine
The ARIA crypto engine includes a generic implementation of the ARIA algorithm which is the block cipher standard of South Korea.

2
BA452 secure connection IP core
The BA452 is a secure connection engine that can be used to off-load the compute intensive Public Key operations.

3
Chacha20-Poly1305 HP
Chacha20-Poly1305 high performance IP core for authenticated encryption.

4
Crypto Coprocessor
The Cryptographic Coprocessor (or CryptoSoc Accelerator) is a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA (Intel SoC, Xilinx Zynq) and ASIC.

5
Cryptography IP solutions, Public Key Accelerators (PKAs) and True Random Number Generators (TRNGs)

Synopsys offers a broad portfolio of silicon-proven DesignWare® Cryptography IP solutions that includes symmetric and hash cryptographic engines, Public Key Accelerators (PKAs) and True Random ...


6
eSecure : Single module for multiple security challenges
The eSecure IP is a complete standalone module that enables security applications by shielding the secret information from the non-secure application running on the main processor.

7
Security Protocol Accelerators provide increased performance, ease-of-use, and advanced security features
Synopsys offers two Security Protocol Accelerator (SPAcc) IP products: - DesignWare® Multipurpose Security Protocol Accelerator (Multipurpose SPAcc) - DesignWare LTE Security Protocol Accelerator (LTE...

8
SHA-3 hashing function
The BA418 is crypto engine IP core for SHA-3 hashing functions compliant to NISTS s FIPS 180-4 and FIPS 202 standards.

9
Silex Insight BA451 MACsec Engine
The BA451 is a very scalable engine implementing the MACsec standard for high throughput applications.

10
SM4 Crypto Engine
The SM4 crypto engine includes a generic & scalable implementation of the SM4 algorithm which is the block cipher standard of China.

11
tRoot Hardware Secure Modules (HSMs)

The DesignWare tRoot Hardware Secure Modules (HSMs) offer silicon-proven, self-contained security solutions with Root of Trust for a wide range of applications, including IoT, industrial control, n...


12
AES Encrypt/Decrypt Core
The AES encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard.

13
Code Protection: Instilling trust into your applications
Inside Secure s Code Protection technology provides powerful automated software protection tools applicable across Mobile, IoT, Desktop and Server platforms.

14
CryptoFirewall Cores
Providing superior security and tamper resistance, while being highly-cost effective. Our cores complement existing security implementations, and are ideal for preventing counterfeiting in a broad number of applications.

15
CryptoManager Root of Trust - CryptoManager RISC-V Root of Trust Programmable Secure Processing Core
The CryptoManager Root of Trust is a fully-programmable hardware security core that protects against a wide range of attacks with state-of-the-art anti-tamper and security techniques to offer vendors security by design.

16
CryptoManager Security Engine
CryptoManager Security Engine is an in-device root-of-trust offered as an embedded hardware core, or as a software agent that can be implemented as a protected element in a trusted OS or directly in the high-level device OS for the secure provisioning of keys and features throughout the device lifecycle. This provides flexible implementation options and allows the CryptoManager Infrastructure to securely communicate with the device to provision keys and manage feature configurations in the supply chain and downstream ecosystems.

17
CryptoManager Security Platform
From chip management to device personalization to downstream feature provisioning, the CryptoManager security platform creates a trusted path from the SoC manufacturing supply chain to downstream service providers with a complete silicon-to-cloud security solution.

18
CryptoManager Trusted Services Security Solutions
The Rambus CryptoManager Trusted Services support a variety of root of trust configurations via a hardware core or secure software, providing a scalable and flexible security solution. Our solutions s...

19
DPA Countermeasures
Our Cryptography Research division discovered Simple Power Analysis (SPA) and Differential Power Analysis (DPA), and developed fundamental solutions and techniques for protecting devices against DPA and related side-channel attacks, along with supporting tools, programs, and services.

20
DPA Resistant Cores
The DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC. These superior performance cores are easy to integrate into SoCs and FPGAs, providing robust side-channel resistance across different security and performance levels.

21
Ensigma Security (IPSec) Protocol Processing Engine
The high performance engine can process multiple gigabits of traffic with short IP packets (40 byte). Ensigma IPSec provides DMA type of interface for programming pointers to the security association data, packet pointers.

22
Ensigma Unified Security Engine (UNISec)
The Ensigma Unified Security Processor (USecP) combines the IPSec, MACSec and DTLS engines into a single unified multi-protocol processing engine supporting eight 1Gbps ports or one 10Gbps port.

23
Inside Secure Root-of-Trust
Designed to be integrated in power constrained microcontroller or complex SoC, Inside Secure Root-of-Trust Engine is the vault that guards the chip most sensitive assets and that establishes the platform security foundations.

24
MACsec-IP-160 - EIP-160 Single Channel flow through MACsec Engines, upto 100Gbps
The MACsec-IP-160 (EIP-160) is an IP family for accelerating MACsec up to 100 Gbps, serving single channel Ethernet designs.

25
Programmable Root-of-Trust Engine
Inside Secure Programmable Root-of-Trust features a RISC-V 32-bit CPU and is delivered with its application development framework.

26
Root-of-Trust Engine
Root-of-Trust Engine, formerly known as Vault-IP,is a Silicon IP developed to protect the SoC platform and its operation so it can securely boot SoCs and protect sensitive key material and assets.

27
Whitebox
Our proven Whitebox technology dissolves cryptographic keys into code. This hides it from anyone spying on the code or its execution. This is coupled with countermeasures (both cryptographic and obfuscation based) to defend against attacks on the Whitebox.

28
AES Encryption & Decryption with Fixed Block Cipher Mode AES-C
The AES-C IP Core implements the FIPS-197 Advanced Encryption Standard. It can be programmed to encrypt or decrypt 128-bit blocks of data, using 128-, 192-, or 256-bit cipher-key. An included configurable wrapper surrounds the AES-C core and implements its fixed Block Cipher mode of operation.

29
AES Encryption & Decryption with Programmable Block Cipher Mode AES-P
The AES-P IP Core implements the FIPS-197 Advanced Encryption Standard. It can be programmed to encrypt or decrypt 128-bit blocks of data, using 128-, 192-, or 256-bit cipher-key.

30
AES encryptor / AES decryptor - Symmetric Security Range
The family of IPX-AES IP-Cores provides an efficient FPGA implementation of the Advanced Encryption Standard (AES). Its flexibility allows the combination of several functions and operating modes for a very small FPGA footprint.

31
Anti-Tamper technologies
Attacks against digital circuits can be performed by actively disrupting the device or by directly tampering with the device’s internal structure. These powerful attacks regroup attempts to inje...

32
Authenticated Encryption & Decryption AES-GCM128
The AES-GCM128 IP Core implements the GCM-AES authenticated encryption and decryption, as specified in the NIST SP800-38D recommendation for GCM and GMAC and the FIPS-197 Advanced Encryption Standard. The core can be programmed to encrypt or decrypt 128-bit blocks of data, using 128-, 192-, or 256-bit cipher-key.

33
Cryptographic library for Elliptic Curve Diffie-Hellman (ECDH) and Elliptic Curve Digital Signature Algorithm (ECDSA)
The Software ECC is a cryptographic library providing the main ECDSA and ECDH functionalities

34
DES Cryptoprocessor
This core is a fully compliant implementation of the DES encryption algorithm. Both encryption and decryption are supported. ECB, CBC and triple DES versions are available. Simple, fully synchronous d...

35
High-quality random generation
Random number generation is a keystone in security. Secure-IC offers both True Random Number Generator (TRNG) resilient to harmonic injection for statistically independent sets of bits generation and ...

36
HMAC-SHA1 Authentication & Hashing function
IPX-HMAC-SHA-1 IP-Core is the hashing function required for the content integrity check and content identification as specified in DCI document v1.2. It is designed for Xilinx and Altera devices.

37
NIST FIPS-197 Compliant Ultra-Low Power AES IP Core
ntAES8 core implements NIST FIPS-197 Advanced Encryption Standard. ntAES8 core can be programmed to encrypt or decrypt 128-bit blocks of data using a 128-bit, 192-bit or 256-bit key.

38
RSA Public Key Cryptography Exponentiation Accelerator
The modular exponentiation accelerator IPX-RSA is an efficient arithmetic coprocessor for the RSA public-key cryptosystem.

39
Secure 128-bit Advanced Encryption Standard (AES) coprocessor
The Secure AES Coprocessor encrypts and decrypts 128-bit data blocks by computing an AES algorithm with a 128, 192 or 256-bit key through a highly secure architecture (SPA, DPA[1] and fault hardened).

40
SHA-1 Secure Hash Function
TheSHA1 IP core is a high performance implementation of the SHA-1 Message Digest algorithm, a one-way hash function, compliant with FIPS 180-1.

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