www.design-reuse-china.com
Search Solutions  
OK
104 "Cryptography" Solutions

1
AES-GCM Ultra-Low Latency
The AES-GCM Ultra-low latency crypto engine is targeted for CXL link encryption with an implementation of the AES-GCM algorithm compliant with the NIST SP 800-38D standard. The unique architecture ena...

2
ARIA Crypto Engine
The ARIA crypto engine includes a generic implementation of the ARIA algorithm which is the block cipher standard of South Korea.

3
BA452 secure connection IP core
The BA452 is a secure connection engine that can be used to off-load the compute intensive Public Key operations.

4
Blockchain Hardware Accelerator
Our solution is a secure public key infrastructure engine that can be used to offload compute-intensive public key operations such as signature generations and verifications.

5
Chacha20-Poly1305 HP
Chacha20-Poly1305 high performance IP core for authenticated encryption.

6
Code Protection: Instilling trust into your applications
Inside Secure s Code Protection technology provides powerful automated software protection tools applicable across Mobile, IoT, Desktop and Server platforms.

7
Crypto Coprocessor
The Cryptographic Coprocessor (or CryptoSoc Accelerator) is a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA (Intel SoC, Xilinx Zynq) and ASIC.

8
CryptoFirewall Cores
Providing superior security and tamper resistance, while being highly-cost effective. Our cores complement existing security implementations, and are ideal for preventing counterfeiting in a broad number of applications.

9
CryptoManager Root of Trust - CryptoManager RISC-V Root of Trust Programmable Secure Processing Core
The CryptoManager Root of Trust is a fully-programmable hardware security core that protects against a wide range of attacks with state-of-the-art anti-tamper and security techniques to offer vendors security by design.

10
CryptoManager Security Engine
CryptoManager Security Engine is an in-device root-of-trust offered as an embedded hardware core, or as a software agent that can be implemented as a protected element in a trusted OS or directly in the high-level device OS for the secure provisioning of keys and features throughout the device lifecycle. This provides flexible implementation options and allows the CryptoManager Infrastructure to securely communicate with the device to provision keys and manage feature configurations in the supply chain and downstream ecosystems.

11
CryptoManager Security Platform
From chip management to device personalization to downstream feature provisioning, the CryptoManager security platform creates a trusted path from the SoC manufacturing supply chain to downstream service providers with a complete silicon-to-cloud security solution.

12
CryptoManager Trusted Services Security Solutions
The Rambus CryptoManager Trusted Services support a variety of root of trust configurations via a hardware core or secure software, providing a scalable and flexible security solution. Our solutions s...

13
DPA Countermeasures
Our Cryptography Research division discovered Simple Power Analysis (SPA) and Differential Power Analysis (DPA), and developed fundamental solutions and techniques for protecting devices against DPA and related side-channel attacks, along with supporting tools, programs, and services.

14
DPA Resistant Cores
The DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC. These superior performance cores are easy to integrate into SoCs and FPGAs, providing robust side-channel resistance across different security and performance levels.

15
High-performance AES-GCM accelerator - optional SCA protection
The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards and Technology (NIST) in 2001. Galois Counter Mod...

16
High-performance AES-XTS accelerator - optional SCA protection
The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards and Technology (NIST) in 2001. It is included in ...

17
Memory (SRAM, DDR, NVM) encryption solution
Memory protection against reverse engineering and tampering Protecting raw memory content from malevolent access Memory protection from the beginning it is written Available with zero latency or high...

18
SHA-3 hashing function
The BA418 is crypto engine IP core for SHA-3 hashing functions compliant to NISTS s FIPS 180-4 and FIPS 202 standards.

19
SM4 Crypto Engine
The SM4 crypto engine includes a generic & scalable implementation of the SM4 algorithm which is the block cipher standard of China.

20
SM4-GCM Multi-Booster
The SM4-GCM Multi-Booster crypto engine is a scalable implementation of the SM4-GCM algorithm compliant with the standard GBT.32907-2016

21
Tunable AES (ECB, CBC, CTR, XTS, CCM, GCM) accelerator - optional SCA protection
The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards and Technology (NIST) in 2001. It is included in ...

22
Tunable Cryptography
Secure-IC offers a broad range of Cryptography technologies with a Tri-Dimensional trade-off of speed vs area vs security to cover customers needs, from Symmetric Cryptography to Asymmetric Cryptogra...

23
Tunable DES - Triple DES (ECB, CBC, CTR) accelerator - optional SCA protection
The Data Encryption Standard (DES) is defined in FIPS PUB 46-3 as a symmetric-key algorithm. The triple DES (TDES) is block cipher that applies the DES algorithm three times to each data block. The TD...

24
Tunable Hash (SHA1-SHA2) accelerator
The Secure Hash Algorithm (SHA) is a family of cryptographic hash function. This family includes SHA-0, SHA-1, SHA-2 and SHA-3. The SHA IP is focused on SHA-1 and SHA-2 algorithms. Although this algor...

25
Tunable Hash (SHA3) accelerator
In the beginning of the 2000s, strong progress has been made on hacking NIST standard hash functions, which led to break of the SHA-1 algorithm. This achievement had a lot of consequences on the other...

26
Tunable HMAC accelerator - compliant with all hash functions (SHA1, SHA2, SM3, SHA3) - optional SCA protection
The HMAC hardware module allows performing NIST HMAC algorithms as standardized in the FIPS 198-1. The module is coupled with one of the NIST standard secure hash algorithm, SHA-1, SHA-256, SHA-384, S...

27
Tunable Public Key Cryptographic (RSA, ECDSA, SM2, Diffie-Hellman) accelerator - optional SCA protection
RSA is a public-key cryptosystem (the encryption key is public when the decryption key is private) widely used for secure data transmission. This IP provides comprehensive RSA encryption / decryption...

28
Tunable SM3 accelerator
The SM3 hash algorithm is a cryptographic hash function designed by the Chinese Commercial Cryptography Administration Office (CCCAO) in order to propose new standard for digital signature generation....

29
Tunable SM4 (ECB, CBC, CTR, XTS, CCM, GCM) accelerator - optional SCA protection
SM4 is a standardized block cipher used in the Chinese National Standard for Wireless LAN WAPI (Wired Authentication and Privacy Infrastructure).

30
Tunable True Random Number Generator compliant with NIST SP800-90 - Digital TRNG
Random number generation is a keystone in security. Secure-IC offers both True Random Number Generator (TRNG) resilient to harmonic injection for statistically independent sets of bits generation and...

31
AES Encrypt/Decrypt Core
The AES encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard.

32
AES Encryption & Decryption with Fixed Block Cipher Mode AES-C
The AES-C IP Core implements the FIPS-197 Advanced Encryption Standard. It can be programmed to encrypt or decrypt 128-bit blocks of data, using 128-, 192-, or 256-bit cipher-key. An included configurable wrapper surrounds the AES-C core and implements its fixed Block Cipher mode of operation.

33
AES Encryption & Decryption with Programmable Block Cipher Mode AES-P
The AES-P IP Core implements the FIPS-197 Advanced Encryption Standard. It can be programmed to encrypt or decrypt 128-bit blocks of data, using 128-, 192-, or 256-bit cipher-key.

34
AES encryptor / AES decryptor - Symmetric Security Range
The family of IPX-AES IP-Cores provides an efficient FPGA implementation of the Advanced Encryption Standard (AES). Its flexibility allows the combination of several functions and operating modes for a very small FPGA footprint.

35
Authenticated Encryption & Decryption AES-GCM128
The AES-GCM128 IP Core implements the GCM-AES authenticated encryption and decryption, as specified in the NIST SP800-38D recommendation for GCM and GMAC and the FIPS-197 Advanced Encryption Standard. The core can be programmed to encrypt or decrypt 128-bit blocks of data, using 128-, 192-, or 256-bit cipher-key.

36
Cryptographic library for Elliptic Curve Diffie-Hellman (ECDH) and Elliptic Curve Digital Signature Algorithm (ECDSA)
The Software ECC is a cryptographic library providing the main ECDSA and ECDH functionalities

37
Cryptography IP solutions, Public Key Accelerators (PKAs) and True Random Number Generators (TRNGs)

Synopsys offers a broad portfolio of silicon-proven DesignWare® Cryptography IP solutions that includes symmetric and hash cryptographic engines, Public Key Accelerators (PKAs) and True Random ...


38
DES Cryptoprocessor
This core is a fully compliant implementation of the DES encryption algorithm. Both encryption and decryption are supported. ECB, CBC and triple DES versions are available. Simple, fully synchronous d...

39
HMAC-SHA1 Authentication & Hashing function
IPX-HMAC-SHA-1 IP-Core is the hashing function required for the content integrity check and content identification as specified in DCI document v1.2. It is designed for Xilinx and Altera devices.

40
New Integrity and Data Encryption (IDE) Security IP Module for PCIe 5.0

PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers to their use in consumer electronics. PCI Expres...


 | 
 Previous Page
 | 1 | 2 | 3 | 
Next Page 
 | 
 Back

业务合作

广告发布

访问我们的广告选项

添加产品

供应商免费录入产品信息

© 2018 Design And Reuse

版权所有

本网站的任何部分未经Design&Reuse许可,
不得复制,重发, 转载或以其他方式使用。