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   Cobham Gaisler provides IP cores and supporting development tools for embedded processors based on the SPARC architecture. The key product is the LEON synthesizable processor model together with a full development environment and a library of IP cores (GRLIB). Our personnel have extended design experience, and have been involved in establishing European standards for ASIC and FPGA development. Aeroflex Gaisler has a long experience in the management of ASIC development projects, and in the design of flight quality microelectronic devices. The company specializes in digital hardware design (ASIC/FPGA) for both commercial and aerospace applications.   
4 SoCs

1
CAN 2.0 Controller with DMA
The GRCAN core is a CAN controller with an AHB DMA backend. The APB bus is used for configuration, control and status handling and the AHB bus is used for retrieving and storing CAN messages in memory external to the CAN controller.

2
CAN-FD controller compatible with both CAN 2.0B and CAN-FD
GRCANFD is a VHDL IP core implementing a CAN-FD controller compatible with both CAN 2.0B and CAN-FD. It consists of an internal CAN-FD codec and a top layer handling the configuration and control of the IP.

3
Philips SJA1000 compatible CAN core
The CAN_OC core is a Philips SJA1000 compatible CAN core with a AHB slave backend.

Embedded Processing->Amba Centric Platform (1)
4
Configurable AMBA bus SoC platform
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for si...

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