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   Xiphera Ltd. is a Finnish company designing hardware-based security solutions using standardised cryptographic algorithms. We have strong cryptographic expertise, extensive experience in system design, and deep knowledge on reprogrammable logic, enabling us to protect our customers’ critical information and assets. Xiphera’s product portfolio consists of secure and efficient cryptographic Intellectual Property (IP) cores, designed for Field Programmable Gate Arrays (FPGAs) and ASICs. Our widely applicable solutions for various end markets offer our customers peace of mind in a dangerous world. Our mission statement is to protect critical systems by designing security directly into hardware.   
28 SoCs

1
AES-CTR, 128-bit key, balanced version
XIP1101B from Xiphera is a balanced Intellectual Property (IP) core implementing the Advanced Encryption Standard (AES) in Counter Mode (CTR). The Counter mode of operation effectively turns a block ...

2
AES-CTR, 128-bit key, high-speed
XIP1101H from Xiphera is a high-speed Intellectual Property (IP) core implementing the Advanced Encryption Standard (AES) in Counter Mode (CTR). The Counter mode of operation effectively turns a bloc...

3
AES-CTR, 256-bit key, high-speed
XIP1103H from Xiphera is a high-speed Intellectual Property (IP) core implementing the Advanced Encryption Standard (AES) in Counter Mode (CTR). The Counter mode of operation effectively turns a bloc...

4
AES-GCM, 128-bit key, balanced version
XIP1111B from Xiphera is a balanced Intellectual Property (IP) core implementing the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM). AES-GCM is a widely used cryptographic algorithm f...

5
AES-GCM, 128-bit key, high-speed version
XIP1111H from Xiphera is a high-throughput Intellectual Property (IP) core implementing the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM). AES-GCM is a widely used cryptographic algo...

6
AES-GCM, 256-bit key, balanced version
XIP1113B from Xiphera is a balanced Intellectual Property (IP) core implementing the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM). AES-GCM is a widely used cryptographic algorithm f...

7
AES-GCM, 256-bit key, high-speed version
XIP1113H from Xiphera is a high-throughput Intellectual Property (IP) core implementing the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM). AES-GCM is a widely used cryptographic algo...

8
Curve25519 Key Exchange (X25519), compact version
XIP4001C from Xiphera is a very compact Intellectual Property (IP) core designed for efficient key exchange using the X25519 protocol. XIP4001C implements arithmetic on Curve25519, and provides a secu...

9
Curve25519 Key Exchange and Digital Signatures, compact version
XIP4003C from Xiphera is a very compact Intellectual Property (IP) core designed for efficient X25519 key exchange and Ed25519-based Edwards-curve Digital Signature Algorithm (EdDSA). XIP4003C impleme...

10
HKDF/HMAC/SHA-256, SHA-256 IP Core with Extended Functionalities
XIP3322B from Xiphera is a versatile Intellectual Property (IP) core designed for SHA-256 cryptographic hash function with extended support for HMAC message authentication code and HKDF key derivation...

11
HKDF/HMAC/SHA-256/SHA-512, SHA-256 IP Core with Extended Functionalities
XIP3327C from Xiphera is a versatile Intellectual Property (IP) core designed for SHA-256 and SHA-512 cryptographic hash functions with extended support for HMAC message authentication code and HKDF k...

12
NIST P-256/P-384 ECDH+ECDSA, compact version
XIP41x3C from Xiphera are a family of compact Intellectual Property (IP) cores implementing Elliptic Curve Diffie-Hellman (ECDH) and Elliptic Curve Digital Signature Algorithm (ECDSA) on NIST prime cu...

13
RSA signature verification, compact version
XIP5012C from Xiphera is a very compact Intellectual Property (IP) core designed for RSA (Rivest-Shamir-Adleman) signature verification. XIP5012C supports all modulus lengths up to 4096 bits, and it c...

14
Secure Hash Algorithm-3 (256 bit digest) IP Core
XIP3032H from Xiphera is a high-speed Intellectual Property (IP) core implementing the Secure Hash Algorithm-3 with a 256 bits long message digest (hash). The SHA-3 family of hash functions are based ...

15
Secure Hash Algorithm-3 (512 bit digest) IP Core
XIP3034H from Xiphera is a high-speed Intellectual Property (IP) core implementing the Secure Hash Algorithm-3 with a 512 bits long message digest (hash). The SHA-3 family of hash functions are based ...

16
SHA-256/224, balanced version
XIP3022B from Xiphera is a balanced Intellectual Property (IP) core implementing the secure hash algorithms SHA-224 and SHA-256 as specified in the Secure Hash Standard published by the National Insti...

17
SHA-512, SHA384, SHA512/256, SHA512/224, balanced version
XIP3026B from Xiphera is a balanced Intellectual Property (IP) core implementing the secure hash algorithms SHA512, SHA384, SHA512/216 and SHA512/224 as specified in the Secure Hash Standard published...

18
True Random Number Generator (TRNG)
XIP8001B from Xiphera is a True Random Number Generator (TRNG) Intellectual Property (IP) core designed in generic and portable VHDL. XIP8001B has been designed for easy integration with FPGA- and ASI...

19
KYBER-512/768/1024 KEM - Balanced Post-Quantum Key Encapsulation IP Core
XIP6110B from Xiphera is an Intellectual Property (IP) core for CRYSTALS-Kyber post-quantum Key Encapsulation Mechanism (KEM). It supports key generation, encapsulation, and decapsulation operations f...

20
MACsec, AES128-GCM, balanced version
XIP1211B from Xiphera is a balanced Intellectual Property (IP) core implementing the MACsec protocol as standardized in IEEE Std 802.1AE-2018. The MACsec protocol defines a security infrastrucure for...

21
MACsec, AES128-GCM, high-speed
XIP1211H from Xiphera is a high-speed Intellectual Property (IP) core implementing the MACsec protocol as standardized in IEEE Std 802.1AE-2018. The MACsec protocol defines a security infrastrucure f...

22
MACsec, AES256-GCM, balanced version
XIP1213B from Xiphera is a balanced Intellectual Property (IP) core implementing the MACsec protocol as standardized in IEEE Std 802.1AE-2018. The MACsec protocol defines a security infrastrucure for ...

23
MACsec, AES256-GCM, high-speed
XIP1213H from Xiphera is a high-speed Intellectual Property (IP) core implementing the MACsec protocol as standardized in IEEE Std 802.1AE-2018. The MACsec protocol defines a security infrastrucure f...

24
Pseudo Random Number Generator, high-speed version (AES256_CTR_DRBG)
XIP8103H from Xiphera is a Pseudorandom Number Generator (PRNG) Intellectual Property (IP) core. XIP8103H is based on Counter (CTR) operation mode of a 256-bit Advanced Encryption Standard (AES) and u...

25
Advanced Encryption Standard XTS mode IP - XIP1183B:_AES256-XTS
XIP1183B from Xiphera is a balanced Intellectual Property (IP) core implementing the Advanced Encryption Standard (AES) with 256-bit long key in XTS mode. XTS is a mode of operation for a block ciphe...

26
Advanced Encryption Standard XTS mode IP - XIP1183H:_AES256-XTS
XIP1183H from Xiphera is a high-speed Intellectual Property (IP) core implementing the Advanced Encryption Standard (AES) with 256-bit long key in XTS mode. XTS is a mode of operation for a block cip...

27
XIP4200H - ECC Accelerator

XIP4200H from Xiphera is an Intellectual Property (IP) core implementing Elliptic Curve Diffie-Hellman (ECDH) and Elliptic Curve Digital Signature Algorithm (ECDSA). This IP core demonstrates a cap...


28
nQrux - Hardware Trust Engines

Xiphera's nQrux™ family of Hardware Trust Engines offers ready-to-implement security modules for various security architectures. The nQrux™ family provides hardware-level trust and ...


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