The multi-lane DesignWare Multi-Protocol 10G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio, meeting the growing needs for low-power consumption and low latency i...
The complete silicon-proven DesignWare® IP solution, consisting of configurable digital controllers, PHYs, IP Prototyping Kits and verification IP, is designed to meet all required features of ...
DesignWare® MIPI® IP solutions enable the interface between system-on-chips (SoCs), application processors, baseband processors and peripheral devices. Synopsys' broad portfolio of MIPI...
Synopsys' complete DesignWare CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 25Gbps and supports cache coherency for high-performance clo...
DesignWare® DDR Memory Interface IP is a family of complete system-level IP solutions for system-on-chips (SoCs) requiring an interface to one or more of the broad range of high-performance DDR...
The DesignWare LPDDR4 multiPHY is Synopsys second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system-in-package applications requiring high-...
LPDDR4 multiPHY: Compatible with JEDEC standard LPDDR4 SDRAMs up to 4,267 Mbps - Maximum data rate is process technology dependent - Compatible with JEDEC standard DDR4 SDRAMs up to 3,200 Mbps - Co...
The demand for advanced multimedia features is pushing device manufacturers to integrate more advanced peripherals such as multi-megapixel cameras and larger screens. Integrating these capabilities...
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