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145 "Automotive, Avionics and High safety" Solutions

1
10G PHY for PCIe 3.0 in TSMC (16nm) for Automotive

The multi-lane DesignWare Multi-Protocol 10G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio, meeting the growing needs for low-power consumption and low latency i...


2
10G PHY for PCIe 3.0 in TSMC (16nm) for Automotive

The multi-lane DesignWare Multi-Protocol 10G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio, meeting the growing needs for low-power consumption and low latency i...


3
ACS-AIP-DPHY-40GF-Auto - MIPI D-PHY in GlobalFoundries 40nm Automotive Process
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete GDSII that includes analog BIST and routing to your pads.

4
ACS-AIP-DPHY-40LP-RA - MIPI D-PHY TSMC 40LP Renesas- Automotive Grade
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete GDSII that includes analog BIST and routing to your pads.

5
ARC EV Processors are fully programmable and configurable IP cores that are optimized for embedded vision applications

DesignWare EV Embedded Vision Processors provide high-performance processing capabilities at a power and cost point low enough for embedded applications, while maintaining flexibility to support an...


6
Arm Cortex-A65AE
The First Multithreaded DynamIQ CPU with Split-Lock

7
Automotive-grade controllers for PCIe 2.0/1.0 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications

The complete silicon-proven DesignWare® IP solution, consisting of configurable digital controllers, PHYs, IP Prototyping Kits and verification IP, is designed to meet all required features of ...


8
Automotive-grade MIPI CSI-2 host/device controllers for high-speed serial interface between image processor and camera sensors

DesignWare® MIPI® IP solutions enable the interface between system-on-chips (SoCs), application processors, baseband processors and peripheral devices. Synopsys' broad portfolio of MIPI...


9
Cadence Automotive Ethernet MAC IP for high-performance in-vehicle networks
The Cadence® Controller IP for Automotive Ethernet IP for high-speed Ethernet communication links between ADAS, infotainment, and other ECUs leveraging time-sensitive Ethernet IP.

10
CAN 2.0B Bus Controller IP Core
The Controller Area Network (CAN) controller IP that implements the CAN2.0A, CAN2.0B as well as newer high performance Non ISO CAN-FD protocols.

11
CAN Controller
The CAN Controller is a synthesizable IP block providing Controller Area Network (CAN) functionality compliant with the CAN Specification Revision 2.0 Part B.

12
CAN FD Bus Controller
The Controller Area Network (CAN) controller IP that implements the CAN2.0A, CAN2.0B as well as newer high performance Non ISO CAN-FD protocols.

13
Compact, ultra-low power ARC EM processors and ASIL-Ready ARC EM Safety Island IP feature excellent code density

The DesignWare® ARC® EM Family of embedded processors is based on the scalable ARCv2 Instruction Set Architecture (ISA) and is optimized for energy and performance efficiency (DMIPS/mW and ...


14
Content Protection (HDCP) 2.2/2.3 embedded security modules (ESMs) for HDMI, DisplayPort, and USB 3.x Type-C interfaces

Synopsys offers highly integrated and proven security solutions spanning silicon cores to embedded software to help content owners, service providers, network operators, embedded system OEMs and So...


15
Controllers for CCIX 25G supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications targeting automotive

Synopsys' complete DesignWare CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 25Gbps and supports cache coherency for high-performance clo...


16
Cortex-R52 Processor
This processor has been designed specifically to address the needs of functional safety. It has been developed within a process to fulfil IEC 61508 SIL 3 and ISO 26262 ASIL D requirements enabling it to be readily adopted for highly dependable systems where safety is critical.

17
DDR and LPDDR 3/2 controllers for low power and high Reliability, Availability and Serviceability (RAS)

DesignWare® DDR Memory Interface IP is a family of complete system-level IP solutions for system-on-chips (SoCs) requiring an interface to one or more of the broad range of high-performance DDR...


18
DDR and LPDDR 4/3/2 controllers for low power and high Reliability, Availability and Serviceability (RAS)

DesignWare® DDR Memory Interface IP is a family of complete system-level IP solutions for system-on-chips (SoCs) requiring an interface to one or more of the broad range of high-performance DDR...


19
DDR and LPDDR 4/3/2 controllers for low power and high Reliability, Availability and Serviceability (RAS) targeting automotive

DesignWare® DDR Memory Interface IP is a family of complete system-level IP solutions for system-on-chips (SoCs) requiring an interface to one or more of the broad range of high-performance DDR...


20
Embedded Vivante GPU, Vision, and IoT cores
Our impressive range of scalable, licensable Vivante GPU cores addresses the rapidly advancing expectations of the semiconductor marketplace from small form-factor IoT type MCUs with low power consumption to powerful SoCs perfect for automotive and high end multimedia applications.

21
FlexCAN Controller
The FlexCAN controller is a highly configurable, synthesizable core implementing the CAN protocol (ISO 11898-1),

22
FlexCAN with CAN-FD
The FlexCAN with CAN-FDis a highly configurable, synthesizable core implementing the CAN protocol (ISO 11898-1)

23
HDMI 2.1 eARC Tx PHY

The Synopsys DesignWare® HDMI 2.1 TX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the necessary logic to implement ...


24
HDMI 2.1 eARC Tx PHY in TSMC (16nm, 12nm)

The Synopsys DesignWare® HDMI 2.1 TX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the necessary logic to implement ...


25
HDMI 2.1 Rx PHY

The Synopsys DesignWare HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the necessary logic to implement and v...


26
HDMI 2.1 Rx PHY TSMC (12nm)

The Synopsys DesignWare HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the necessary logic to implement and v...


27
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries

Synopsys provides a broad portfolio of high-quality, silicon-proven foundation IP, including memory compilers and non-volatile memory (NVM), logic library, and test solutions, enabling system-on-ch...


28
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for HUALI (55nm, 40nm)

Synopsys provides a broad portfolio of high-quality, silicon-proven foundation IP, including memory compilers and non-volatile memory (NVM), logic library, and test solutions, enabling system-on-ch...


29
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for SMIC (65nm, 40nm)

Synopsys provides a broad portfolio of high-quality, silicon-proven foundation IP, including memory compilers and non-volatile memory (NVM), logic library, and test solutions, enabling system-on-ch...


30
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC (65nm, 40nm, 28nm, 16nm)

Synopsys provides a broad portfolio of high-quality, silicon-proven foundation IP, including memory compilers and non-volatile memory (NVM), logic library, and test solutions, enabling system-on-ch...


31
High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for UMC (40nm, 28nm)

Synopsys provides a broad portfolio of high-quality, silicon-proven foundation IP, including memory compilers and non-volatile memory (NVM), logic library, and test solutions, enabling system-on-ch...


32
LPDDR4 Memory Model Verification IP for Automotive
This Cadence® Memory Model Verification IP (VIP) supports the JEDEC® Low Power Memory Device, LPDDR4 standard.

33
LPDDR4 multiPHY V2 in TSMC (16nm) for Automotive

LPDDR4 multiPHY: Compatible with JEDEC standard LPDDR4 SDRAMs up to 4,267 Mbps - Maximum data rate is process technology dependent - Compatible with JEDEC standard DDR4 SDRAMs up to 3,200 Mbps - Co...


34
LPDDR5/4/4X PHY in TSMC (16nm, 7nm)

The DesignWare LPDDR5/4/4X PHY is Synopsys' physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and systemin-package applications requiring high-performance LPDD...


35
Mali Camera
Mali-C71 is the first product in the Mali Camera series of Image Signal Processors (ISP) from Arm s imaging & Vision Group.

36
MIPI D-PHY in TSMC for Automotive (28nm, 16nm)

The demand for advanced multimedia features is pushing device manufacturers to integrate more advanced peripherals such as multi-megapixel cameras and larger screens. Integrating these capabilities...


37
MIPI DSI-2 controllers with VESA DSC for high-speed serial interface between application processor and displays

DesignWare® MIPI® IP solutions enable the interface between system-on-chips (SoCs), application processors, baseband processors and peripheral devices. Synopsys' broad portfolio of MIPI...


38
MIPI DSI-2 host/device controllers for high-speed serial interface between application processor and displays

DesignWare® MIPI® IP solutions enable the interface between system-on-chips (SoCs), application processors, baseband processors and peripheral devices. Synopsys' broad portfolio of MIPI...


39
MultiCAN Controller
Since its introduction in the mid-1980s, the Controller Area Network (CAN) has become a standard network protocol for automotive applications.

40
NVM FTP Trim

The Synopsys DesignWare® Few Time Programmable (FTP) Trim Non-Volatile Memory (NVM) IP provides the capability of reprogrammable NVM in a standard CMOS and Bipolar-CMOS-DMOS (BCD) processes. Op...


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